flatbeh (1)

flatbeh root_structural_file [ output_file ]

This software belongs to the ALLIANCE CAD system from the

CAO-VLSI team at MASI laboratory, University P. et M. Curie

4, place Jussieu ; 75252 PARIS Cedex 05 ; FRANCE

Fax: (33-1) 44.27.62.86 ; E-mail: [email protected]

flatbeh synthetize a VHDL behavioral data-flow description from a structural description. It flattens the structural description (it can be a hierarchy of macro block) until the cells which have a behavioral description. Then it raise all the equations and create a behavioral description of the root file.

root_structural_file is the filename of the root of the structural description file.

output_file is the destination filename for behavioural description.

MBK_CATA_LIB

list of directories containing descriptions. The default path is the current directory (see mbk(1)).

MBK_CATAL_NAME

Indicates the file where the behavioral description files are given. This serves to flatbeh to stop the flatten of the structural root circuit.(see mbk(1))

MBK_IN_LO

file extension for structural entity. (see mbk(1))

flatbeh adder_32

vhdl(5), mbk(1).

Please e-mail to [email protected] for bug report and suggestions.