Support for mips 74k processors
#include <perfmon/pfmlib.h> PMU name: mips_74k PMU desc: MIPS 74k
The library supports MIPS 74k processors in big or little endian modes.
On this processor, what is measured by an event depends on the event code and on the counter it is programmed on. Usually the meaning of the event code changes between odd and even indexed counters. For instance, event code 0x2 means 'PREDICTED_JR31' when programmed on even-indexed counters and it means 'JR_31_MISPREDICTIONS' when programmed on odd-indexed counters. To correctly measure an event, one needs both the event encoding and a list of possible counters.
When pfm_get_os_event_encoding() is used with PFM_OS_NONE to return the raw PMU encoding, the library returns two values: the event encoding as per the architecture manual and a bitmask of valid counters to program it on. For instance, for 'JR_31_MISPREDICTIONS' The library returns codes[0] = 0x4a, codes[1]= 0xa (supported on counter 1, 3).
The encoding for a specific kernel interface may vary and is handled internally by the library.
The following modifiers are supported on MIPS 74k.
u
Measure at user level. This corresponds to PFM_PLM3. This is a boolean modifier.
k
Measure at kernel level. This corresponds to PFM_PLM0. This is a boolean modifier.
e
Measure at exception level. This corresponds to PFM_PLM2. This is a boolean modifier.
s
Measure at supervisor level. This corresponds to PFM_PLM1. This is a boolean modifier.
It should be noted that those modifiers are available for encoding as raw mode with PFM_OS_NONE but they may not all be present with specific kernel interfaces.
Stephane Eranian <[email protected]>