runway4
Runway bus
Usage
uturn* at mainbus?
Overview
The runway bus is a CPU and memory bus on systems based on the PA-7200, PA-8000, and later CPUs. The runway bus is a 64-bit multiplexed address/data bus with support for cache coherency and allows up to 4-way SMP system configurations.
One or two uturn(4) bridges connect the runway bus to the system's gsc(4) or pci(4) buses.