nvme_cmbsz2

This field indicates the controller memory buffer size

Usage

enum nvme_cmbsz {
NVME_CMBSZ_SQS_SHIFT ,

NVME_CMBSZ_CQS_SHIFT ,

NVME_CMBSZ_LISTS_SHIFT ,

NVME_CMBSZ_RDS_SHIFT ,

NVME_CMBSZ_WDS_SHIFT ,

NVME_CMBSZ_SZU_SHIFT ,

NVME_CMBSZ_SZ_SHIFT ,

NVME_CMBSZ_SQS_MASK ,

NVME_CMBSZ_CQS_MASK ,

NVME_CMBSZ_LISTS_MASK ,

NVME_CMBSZ_RDS_MASK ,

NVME_CMBSZ_WDS_MASK ,

NVME_CMBSZ_SZU_MASK ,

NVME_CMBSZ_SZ_MASK ,

NVME_CMBSZ_SZU_4K ,

NVME_CMBSZ_SZU_64K ,

NVME_CMBSZ_SZU_1M ,

NVME_CMBSZ_SZU_16M ,

NVME_CMBSZ_SZU_256M ,

NVME_CMBSZ_SZU_4G ,

NVME_CMBSZ_SZU_64G

};

Constants

`NVME_CMBSZ_SQS_SHIFT`	Shift amount to get the submission queue support
`NVME_CMBSZ_CQS_SHIFT`	Shift amount to get the completion queue support
`NVME_CMBSZ_LISTS_SHIFT`	Shift amount to get the PLP SGL list support
`NVME_CMBSZ_RDS_SHIFT`	Shift amount to get the read data support
`NVME_CMBSZ_WDS_SHIFT`	Shift amount to get the write data support
`NVME_CMBSZ_SZU_SHIFT`	Shift amount to get the size units
`NVME_CMBSZ_SZ_SHIFT`	Shift amount to get the size
`NVME_CMBSZ_SQS_MASK`	Mask to get the submission queue support
`NVME_CMBSZ_CQS_MASK`	Mask to get the completion queue support
`NVME_CMBSZ_LISTS_MASK`	Mask to get the PLP SGL list support
`NVME_CMBSZ_RDS_MASK`	Mask to get the read data support
`NVME_CMBSZ_WDS_MASK`	Mask to get the write data support
`NVME_CMBSZ_SZU_MASK`	Mask to get the size units
`NVME_CMBSZ_SZ_MASK`	Mask to get the size
`NVME_CMBSZ_SZU_4K`	4 KiB
`NVME_CMBSZ_SZU_64K`	64 KiB
`NVME_CMBSZ_SZU_1M`	1 MiB
`NVME_CMBSZ_SZU_16M`	16 MiB
`NVME_CMBSZ_SZU_256M`	256 MiB
`NVME_CMBSZ_SZU_4G`	4 GiB
`NVME_CMBSZ_SZU_64G`	64 GiB