chvgpio(4)

chvgpio4

Intel cherry view soc gpio controller

Usage

device gpio device chvgpio

Overview

chvgpio supports the GPIO controller that can be found in Intel's Cherry View SoC family.

The Cherry View SoC has 5 banks of GPIO pins, NORTH, EAST, SOUTHEAST, SOUTHWEST and VIRTUAL. All but VIRTUAL are exposed to userland as /dev/gpiocN, where N is 0-3. Pins in each bank are pre-named to match names in the Intel® Atom™ Z8000 Processor Series Vol 2

Releases

23 releases since FreeBSD 11.2-RELEASE; the text changed 9 times.

  1. 11.2
  2. 11.3
  3. 11.4
  4. 12.0
  5. 12.1
  6. 12.2
  7. 12.3
  8. 12.4
  9. 13.0–13.2
  10. 13.3–16.0

History

The chvgpio manual page first appeared in FreeBSD 12.

Authors

This driver and man page were written by Tom Jones ⟨[email protected]⟩.

From base 16.0-CURRENT-20261027-61c70dc16a79 in FreeBSD 16.0-CURRENT (2026-10-27). Parsed by carta from the page's mdoc source.